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CPU


Detailed information about processor, cache, clocks, temperature, voltage and processor features.

CPU

Processor: Vendor, name and number of the processor and also expected (not-overclocked) processor clock.

Coprocessor: Vendor and name of the numeric coprocessor. In 486DX and higher coprocessor and processor are using the same crystal (except NexGen Nx586/686); coprocessor is identified as Internal.

CPU Clock: Processor frequency. For Pentium processors frequency is defined with the RDTSC command reading TSC (Time Stamp Counter). Frequency accuracy reaches 0.1 MHz with any CPU usage. For 486 and lower processors frequency is defined by its speed.

Level 1 Cache: L1 cache size (cache for keeping data and instruction). Is identified for Intel processors of the sixth generation and higher, AMD K5 PR120 and higher, VIA Cyrix III and higher, Centaur processors.

Level 2 Cache: L2 cache size. L2 cache is integrated in the processor and identified for Intel processors of the sixth generation, AMD K6-2+ and higher, VIA Cyrix III and higher.

Level 2 Cache Clock: L2 cache clock.

Level 3 Cache: L3 cache size.

Level 4 Cache: L4 cache size.

E-core Level 1 Cache: Efficient core L1 cache size (cache for keeping data and instruction). Is identified for Intel Hybrid processors.

E-core Level 2 Cache: Efficient core L2 cache size. L2 cache is integrated in the processor and identified for Intel Hybrid processors.

Code Name: Processor code name before its official release.

Manufacturing Process: Production technology in nm.

Bus Type: CPU to Northbridge bus type (Intel Front-Side Bus (FSB), Intel QuickPath Interconnect (QPI), AMD HyperTransport).

System Bus Clock: Processor system bus clock.

QPI Clock: QuickPath Interconnect (QPI) frequency for Intel processors.

QPI Speed: QuickPath Interconnect (QPI) speed for Intel processors.

HyperTransport Clock: HyperTransport clock for AMD processors.

Bus Bandwidth: The total amount of data that can theoretically be transferred on the bus.

FSB Clock: Processor FSB clock and bus type (DDR, QDR). Is determined for Intel Pentium Pro processors and higher, AMD K6-2 and higher, VIA Cyrix III and higher, IDT WinChip2 and higher.

Multiplier: Processor clock multiplier. Is determined for Intel Pentium Pro processors and higher, AMD K6-2 and higher, VIA Cyrix III and higher, IDT WinChip2 and higher.

Expected Clock: Expected (not-overclocked) processor clock. It allows to identify the processor overclocked. Is available for Intel Pentium Pro processors and higher.

Overclocking Support: Processor overclocking support: overclocking bins in MHz or unlocked multiplier.

AMD Core Performance Boost (AMD Turbo Core Technology): Support for AMD Core Performance Boost (enabled/disabled).

Max Turbo Clock: Maximum overclocked frequency of processors with Intel Turbo Boost or AMD Core Performance Boost.

Max Turbo Clock E-cores: Maximum overclocked frequency of efficient cores of Intel Hybrid processors.

Turbo Boost: Information about Intel Turbo Boost technology and Turbo Boost status - enabled/disabled.

Turbo Boost E-cores: Information about Intel Turbo Boost technology and Turbo Boost status - enabled/disabled for Intel Hybrid processors.

Turbo Clock (N core): Maximum overclocked frequency for N core.

Processor Topology: Number of Nodes, Modules/CPU Complexes (CCX), cores, threads.

Socket Type: Socket (slot, socket) and package processor type. Is determined for Intel Pentium II processors and higher.

Instruction Set: List of supported instruction sets (IA-32, x86-64, AMD64, MMX, 3DNow, SSE, SSE2, SSE3, SSE4, AVX, AVX2, AES, FMA, VT-x, SHA, AMD-V).

Maximum Temperature (Tjmax): Maximum junction temperature of Intel Core processors and higher.

Core Voltage: CPU core voltage.

Northbridge Clock: Northbridge clock for AMD Phenom II processors and higher.

Northbridge Voltage: Northbridge voltage for AMD Phenom II processors and higher.

Maximum Uncore Clock: Maximum frequency of the non-core parts of the CPU (memory controller, ring bus, last level cache).

Vendor: Identification of the processor's vendor

  • 'GenuineIntel' - for Intel company;
  • 'AuthenticAMD' - for AMD company;
  • 'UMC UMC UMC ' - for UMC company;
  • 'CyrixInstead' - for Cyrix company;
  • 'NexGenDriven' - for NexGen company;
  • 'CentaurHauls' - for Centaur/IDT company;
  • 'RiseRiseRise' - for Rise company;
  • 'GenuineTMx86' - for Transmeta company;
  • 'Geode by NSC' - for National Semiconductor company;
  • 'SiS SiS SiS ' - for SiS company;
  • 'Vortex86 SoC' - for DM&P company;
  • 'Genuine RDC' - for RDC company.
  • 'HygonGenuine' - for Hygon company.
  • ' Shanghai ' - for Zhaoxin company.

Processor Name: Internal processor name.

Processor Type: Identifies single, dual processors and overdrive processors. The program will type 'Original OEM Processor', 'OverDrive Processor' and 'Dual Processor'.

CPUID: Family, Model, Stepping. Information identified by the CPUID instruction. Family is processor generation (for Intel processors: 4 - 486, 5 - Pentium, 6 - Pentium Pro and processors based on the it core).

Ext. Family/Model: Extended Family and Model.

CPU Signature: Processor 8-byte verification code.

BrandID: Identifies Celeron, Pentium III, Pentium III Xeon, Pentium III-S, Pentium III-M, Celeron Mobile, Pentium 4, Pentium 4-M, Xeon, Xeon MP, AMD Opteron and Athlon 64 processors. Available on Intel processors based on the 0.18-micron Coppermine technology.

Number of Cores: Number of processor cores on physical chip.

Logical Cores Count: Count of logical cores of Hyper-Threading technology.

Number of P-cores: Type, number of physical and logical performance cores (P-cores) for Intel Hybrid processors.

Number of E-cores: Type, number of physical and logical efficient cores (E-cores) for Intel Hybrid processors.

Serial Number: Processor Serial Number. Available on Intel Pentium III and Intel Pentium II Mobile processors. The serial number must be enabled in BIOS Setup.

Engineer Sample: Available for Engineer Sample only.

Core Stepping: Core stepping to identify processor errors and frequency rates.

sSpec Number: sSpec Number for Intel processors.

QDF Number: QDF Number for Engineer Sample of Intel processors.

OPN Code: OPN Code for AMD processors.

Microcode Revision: Processor microcode revision.

Max TDP: Maximum Thermal Design Power (TDP).

Configurable TDP: Manufacturer-configured TDP for the given processor frequency.

Power Limit 1 (Time): Long Power Limit (time in seconds).

Power Limit 2 (Time): Short Power Limit (time in milliseconds).

Transistor Count: Number of transistor.

Die Size: CPU die size in mm2.

Family Frequency Range: Frequency range on which processors of the given family were made.

Family Release Date: Release date of the given family.

Launch Date: Launch date of this CPU model.

Recommended Price (USD): Recommended customer price in USD at the launch date of this CPU model.

Integrated Graphics

Integrated Graphics: Name of integrated graphics controller.

Video Memory Size:

Status: Current status (enabled/disabled).

Location: Graphics controller location (CPU Integrated).

Hardware ID: Integrated graphics hardware identifier.

Revision: Integrated graphics silicon revision.

Hardware Monitoring

Core Voltage: Current CPU core voltage.

Package Temperature: Temperature of processor package. Available for Intel Sandy Bridge processors and higher.

System Bus Clock: Current system bus clock.

FSB Clock: Current FSB clock and bus type (DDR, QDR).

Current Uncore Clock: Frequency of the non-core parts of the CPU (memory controller, ring bus, last level cache).

Core N

Temperature Core: Current temperature of CPU core. Available for Intel Core and AMD Athlon processors and higher.

Core Clock: Current frequency of CPU core. 'Origianl' is expected (not-overclocked) core clock.

Multiplier: Current clock multiplier.

Instruction Set

List of additional command set.

  • Floating-Point Unit On-Chip
  • IA MMX Technology
  • SSE Instruction Set
  • SSE2 Instruction Set
  • SSE3 Instruction Set
  • Supplemental SSE3 Instruction Set
  • SSE4.1 Instruction Set
  • SSE4.2 Instruction Set
  • Advanced Vector Extensions (AVX)
  • Advanced Vector Extensions 2 (AVX2)
  • AVX-512 Foundation Instructions
  • AVX-512 Prefetch Instructions
  • AVX-512 Exponential and Reciprocal
  • AVX-512 Conflict Detection
  • AVX-512 Byte and Word Instructions
  • AVX-512 Doubleword and Quadword
  • AVX-512 Vector Length Extensions
  • AVX-512 Integer Fused Multiply-Add
  • AVX-512 Vector Bit Manipulation
  • AVX-512 QVNNI Instructions
  • AVX-512 QFMA Instructions
  • AVX-512 VBMI2 Instructions
  • AVX-512 VNNI Instructions
  • AVX-512 BITALG Instructions
  • Galois Field NI/Affine Transformation
  • VEX-encoded AES-NI (VAES)
  • VEX-encoded PCLMUL (VPCL)
  • PCOMMIT Instruction
  • CLWB Instruction
  • PREFETCHWT1 Instruction
  • Software Guard Extensions (SGX)
  • SGX Launch Configuration
  • FMA Instructions Set
  • AES Instructions Set
  • Intel Extended Memory 64 Tech. - Intel Extended Memory 64 Technology
  • Intel Architecture - 64 (IA-64)
  • AMD MMX Instruction Extensions
  • AMD 3DNow! Instructions
  • AMD 3DNow! Extensions
  • AMD 3DNow! Prefetch
  • AMD SSE4A Extensions
  • AMD eXtended OPeration (XOP)
  • AMD Misaligned SSE
  • AMD64 Architecture
  • Cyrix Extended MMX
  • CMPXCHG8 Instruction Supported
  • CMPXCHG16 Instruction Supported
  • Fast System Call
  • Conditional Move Instruction
  • CLFLUSH Instruction
  • Fast Save and Restore
  • Monitor/MWAIT Instructions
  • SYSCALL/SYSRET Instructions
  • LAHF/SAHF Instructions
  • POPCNT Insruction Supported
  • XSAVE Insructions Supported
  • OS Supports XSAVE Instructions
  • PCLMULQDQ Instruction Supported
  • MOVBE Insruction Supported
  • F16C Insruction Supported
  • RDTSCP Insruction Supported
  • RDRAND Insruction Supported
  • (RD/WR)(FS/GS) BASE Instructions
  • Bit Manipulation 1 Instructions
  • Bit Manipulation 2 Instructions
  • Enhanced REP MOVSB/STOSB
  • INVPCID Instruction
  • XSAVEOPT Instruction
  • RDSEED Instruction
  • ADCX/ADOX Instructions
  • CLAC/STAC Instructions
  • SCLFLUSHOPT Instruction
  • RDPID Instruction
  • VPOPCNT[D/Q] Instruction
  • Fast Short REP MOV Instruction
  • PCONFIG Instruction
  • WBNOINVD Instruction
  • WaitPKG Instructions
  • CLDEMOTE Instruction
  • MOVDIRI Instruction
  • MOVDIRI64B Instruction
  • RDPRU Instruction
  • MCOMMIT Instruction
  • AMD Fast Save and Restore
  • AMD SKINIT, STGI, DEV Supported
  • AMD Light Weight Profiling (LWP)
  • AMD FMA4 Insruction Supported
  • AMD TBM Insruction Supported
  • AMD MONITORX/MWAITX Instructions
  • AMD CLZERO Instruction

Processor Features

List of processor features returned by the CPUID instruction.

  • Hypervisor Present
  • Virtual Mode Extension
  • Debugging Extension
  • Page Size Extension
  • Time Stamp Counter
  • Model Specific Registers
  • Physical Address Extension
  • Machine Check Exception
  • On-chip APIC Hardware Supported - built-in hardware APIC (must be enabled in BIOS)
  • Memory Type Range Registers
  • Page Global Enable
  • Machine Check Architecture
  • Page Attribute Table
  • 36-bit Page Size Extension
  • Processor Serial Number
  • Debug Store
  • 64-bit Debug Store
  • Self-Snoop
  • Hyper-Threading Technology
  • Pending Break Enable
  • CPL-Qualified Debug Store
  • L1 Context ID
  • Send Task Priority Messages
  • Direct Cache Access
  • Performance Capabilities MSR
  • x2APIC Architecture
  • Advanced Bit Manipulation
  • OS Visible Workaround
  • Instruction Based Sampling
  • 1-GB Large Page
  • Process Context Identifiers
  • Time Stamp Counter Deadline
  • Time Stamp Counter Adjust
  • Intel Virtualization Technology
  • Intel Trusted Execution Technology
  • Supervisor Mode Execution Protection
  • Hardware Lock Elision
  • Restricted Transactional Memory
  • Quality of Service Monitoring
  • Quality of Service Enforcement
  • Deprecated FPU CS and FPU DS
  • Memory Protection Extensions (MPX)
  • Processor Trace (PT)
  • Secure Hash Algorithm Extensions (SHA)
  • Debug Interface MSR
  • User-Mode Instruction Prevention
  • Protection Keys for User-Mode Pages
  • 5 Level Page Table
  • Total Memory Encryption (TME)
  • Speculation Control (IBRS and IBPB)
  • Single Thread Indirect Branch Predictors
  • L1 Data Cache (L1D) Flush
  • ARCH_CAPABILITIES MSR
  • Speculative Store Bypass Disable (SSBD)
  • Intel Turbo Boost Technology
  • Intel Turbo Boost Max Technology 3.0
  • Intel Execute Disable Bit
  • Hybrid Processor
  • AMD Turbo Core Technology
  • AMD No-execute Page Protection
  • AMD Secure Virtual Machine
  • AMD Model-Specific Registers
  • AMD Multiprocessing Capable
  • AMD CMP Legasy Mode
  • AMD CR8 in Legasy Mode
  • AMD Ext. APIC Register Space - AMD Extended APIC Register Space
  • AMD Watchdog Timer
  • AMD Translation Cache Extension
  • AMD Topology Extensions
  • AMD Core Performance Counter Ext. - AMD Core Performance Counter Extension
  • AMD NB Performance Counter Ext. - AMD NB Performance Counter Extension
  • AMD Streaming Performance Monitor
  • AMD Data Breakpoint Extension
  • AMD Performance TSC
  • AMD L2I Performance Counter Ext.
  • AMD IRPERF Performance Counter
  • AMD Always Save/Restore FP Error Pointers
  • AMD Indirect Branch Prediction Barrier
  • AMD Indirect Branch Restricted Speculation
  • AMD IBRS Always On Mode
  • AMD IBRS Preferred
  • AMD Single Thread Indirect Branch Predictor
  • AMD STIBP Always On Mode
  • AMD Speculative Store Bypass Disable (SSBD)
  • AMD SSBD Not Needed
  • AMD VIRT_SPEC_CTRL MSR

Power Management

List of additional power management features.

  • ACPI Supported
  • Thermal Monitor Supported
  • Thermal Monitor 2
  • Enhanced SpeedStep Technology
  • Digital Thermal Sensor
  • Operating Point Protection
  • Always Running APIC Timer
  • Invariant TSC
  • Power Limit Notification
  • Extended Clock Modulation Duty
  • Package Thermal Management
  • Hardware Coordination Feedback
  • ACNT2 Capability
  • Performance-Energy Bias
  • Hardware-Managed P-State Base Support
  • Hardware Duty Cycle Programming (HDC)
  • AMD Temperature Sensor
  • AMD Frequency ID Control
  • AMD Voltage ID Control
  • AMD Thermal Trip
  • AMD Thermal Monitoring
  • AMD Software Thermal Control
  • AMD 100MHz Multiplier Steps
  • AMD Hardware P-State Control
  • AMD Effective Frequency Interface
  • AMD Processor Feedback Interface
  • AMD Processor Accumulator
  • AMD Connected Standby
  • AMD Running Average Power Limit
  • AMD MCA Overflow Recovery
  • AMD Software Uncorr. Error Containment/Recovery
  • AMD Hardware Assert (HWA)
  • AMD Scalable MCA

If your processor doesn't support CPUID, this window will be closed after showing the first three items and displaying a message 'CPUID Command: Not Present'.

Driver

See Driver page for more details.


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